January 20, 2020

New High Power Motor Drive

I've been working on a large robot-size motor drive, with a design target of 75V, >70A (peak phase) continuous with heatsinking, and >150A peak.  In order to make the drive as compact as possible, it's split into three separate boards stacked on top of each other.  The bottom layer is the power layer with MOSFETs, ceramic DC link capacitors, and current shunts.  To minimize the thermal resistance between all the heat generating components to the world, the power layer is built on a 2-layer aluminum substrate board.  Above the power board is the logic board with microcontroller and gate-drive, built on a normal 4-layer 1 oz board.   On the very top is a breakout board with connectors for DC power input, the 3 phases, and communication/encoder

To get a better feel for how well the aluminum power board will work, I built a simple half-bridge using the same FETs as I plan on using for the final motor drive.  

Here's the first test-board, affectionately named The Half Bridge of Science.  It's just 2 parallel TPW3R70APL FETs per side, some 250V .47 uF ceramic caps, and a couple TLP152 gate-drive optocouplers to drive the gates.

Here's my dummy load for the half-bridge:  4 big "Pickle" resistors in a 2S2P arrangement for 1 ohm and lots of watts, with the boost converter inductor from a Ford Fusion hybrid in series.

Here it is with 55 DC amps (equivalent to 77 peak sinusoidal amps) going out of it at 50V on the input at a 50% duty cycle, basically perfectly maxing out the MITERS Lambda 50V 30A supplies.

Here are side-by-side shots of the board with a thermal camera at 55A switching at 10 kHz on the left, and 20 kHz on the right.  Here's it's poorly  clamped to a heatsink with no thermal paste.  At 10 kHz, the FETs (Sp2) ran at 57 C, and the ceramic capacitors (Sp1) at 55.  At 20 kHz, the FETs were at 65 C and the hottest of the ceramics at 75 C.  Looks like I need more DC link ceramics to handle the ripple current.

 There were a few mistakes with this board, so I expect thermal performance to only get better from here - I accidentally used the 1 W/m-K insulator instead of the 2 W/m-K insulator that's also available, and I misinterpreted the minimum via size, so the thermal vias were huge and sparse.  This seemed pretty promising, so I designed 3-phase version

Here's the populated 3-phase power board.  For testing, I got a normal FR4 board to confirm that everything works.  The copper power links between the boards were custom-machined, since I couldn't find any COTS pins that were as compact.

Here's the logic board, minus gate driver.  To start out, I'm trying the DRV8353S gate drive IC.  It's very similar to the DRV8323 I used on my smaller motor drives.  I went for the version without a built-in buck converter and use an external 15V and 5V buck to power everything.  Since the DRV8323 was good for driving 2 FETs very similar to these at 40 kHz, it should be able to drive twice as many FETs at 20 kHz.

The top of the stack has Wurth terminals to get power in and out, and some JST-SH's for logic.  I plan on replacing the logic connectors with something more robust like the Harwin Datamate L-Tek's I used on the Mini Cheetah, once everything is up and running.

The assembled stack:

Next time it will be a little bit thinner - I ordered the wrong male header for the board-to-board connectors, so the boards sit a little further apart than I originally intended.

Next to a coke can for a sense of scale.  The footprint of the drive is 45x45mm.

Hooked into a giant T-motor U15 I'm using for testing:

That's all for now.  There were two swapped pins on the logic board I had to fix with air-wires, but other than that everything seems to work.  Unfortunately I made some dumb testing mistakes and blew up the controller before I could push it too hard, and the stacked construction is almost impossible to disassemble.  But now that I know the board layout works I'm going to send out for the aluminum power boards.  Stay tuned.


  1. Excited to see the final actuator! With two parallel FETs, do you see parasitic ringing on the gates when driving them? Or are you using a resistor/ferrite bead to dampen it?

    On a different note, what reflow process do you usually use when you populate your boards? I assume you do it yourself vs having the PCB fab house do it for you ... ?

    1. Why there is parasitic ringing on the gates with two parallel FETs? I assume the fets' driver just need to charge the parasitic capacitors of gates, so 40KHz down to 20KHz

    2. Check Toshiba's Application Note "Power MOSFET Selecting MOSFFETs and Consideration for Circuit Design", specifically sections 2.4 and 2.7

    3. Additionally the other Note "MOSFET Parallening
      (Parasitic Oscillation between Parallel
      Power MOSFETs)"

  2. Ben, do you have any news on this project?
    Is it dead, on hold or under NDA? :)

    1. I don't have any updates yet. I got stalled by covid shutdowns and loosing access to pcb assembly/debugging equipment, but hopefully (current parts shortages allowing) will get back to it soon